
2009 Microchip Technology Inc.
DS39682E-page 167
PIC18F45J10 FAMILY
FIGURE 16-8:
I2C SLAVE MODE TIMING WITH SEN = 0 (RECEPTION, 7-BIT ADDRESSING)
SDAx
SCL
x
SSP
xI
F
(
P
IR
1
<
3
>
o
rPI
R3
<7
>)
B
F
(
S
P
xS
TA
T
<
0>)
S
SPO
V
(
S
P
xC
O
N
1
<
6
>
)
S
1
2
3
4
56
7
8
9
1
2
3
4
5
6
7
89
1
2
3
4
5
7
8
9
P
A
7
A6
A5
A4
A3
A2
A
1
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D1
D0
ACK
Re
ce
ivin
g
Da
ta
AC
K
Re
ce
ivin
g
Da
ta
R/W
=
0
AC
K
Re
ce
ivin
g
Ad
dr
e
ss
Cle
ar
e
d
in
so
ftwa
re
SSP
xB
UF
is
r
e
a
d
B
u
sm
a
ster
te
rmina
tes
tr
ansfer
S
P
OV
is
set
be
cause
S
P
xB
U
F
is
still
fu
ll.
A
C
K
is
not
sent.
D2
6
CK
P
(C
K
P
does
not
r
e
set
to
‘0
’wh
e
n
S
E
N
=
0
)